INSTRUCTION SET OF 8085 MICROPROCESSOR

INSTRUCTION SET: 

An instruction set is a command given to the computer to perform specific operation. it contains command , operand and address of source  and destination.

8085 Microprocessor have five types of instruction set :  

• Data transfer instruction

• Arithmetic  instructions

• Logical instructions

• Control instructions

• Branching instructions 

  Data transfer instructions:   Instructions, which are used to transfer data from one register to another register, from memory to register or register to memory, come under this group. Examples are: MOV, MVI, LXI, LDA, STA etc. When an instruction of data transfer group is executed, data is transferred from the source to the destination without altering the contents of the source.

  
  
  • MOV r1, r2 (Move Data; Move the content of the one register to another).  [r1] <-- [r2]
  • MOV r, m (Move the content of memory register). r <-- [M]
  • MOV M, r. (Move the content of register to memory). M <-- [r]
  • MVI r, data. (Move immediate data to register). [r] <-- data.
  • MVI M, data. (Move immediate data to memory). M <-- data.
  • LXI rp, data 16. (Load register pair immediate). [rp] <-- data 16 bits, [rh] <-- 8 LSBs of data.
  • LDA addr. (Load Accumulator direct). [A] <-- [addr].
  •  STA addr. (Store accumulator direct). [addr] <-- [A].
  • LHLD addr. (Load H-L pair direct). [L] <-- [addr], [H] <-- [addr+1].
  • SHLD addr. (Store H-L pair direct) [addr] <-- [L], [addr+1] <-- [H].
  • LDAX rp. (LOAD accumulator indirect) [A] <-- [[rp]]
  • STAX rp. (Store accumulator indirect) [[rp]] <-- [A].
  • XCHG. (Exchange the contents of H-L with D-E pair) [H-L] <-->  [D-E].
   
   
  

   Arithmetic instructions:  The instructions of this group perform arithmetic operations such as addition, subtraction; increment or decrement of the content of a register or memory. Examples are: ADD, SUB, INR, DAD etc.
  

  
  
  •  ADD r. (Add register to accumulator) [A] <-- [A] + [r].DAA (Decimal adjust accumulator) .
  • ADD M. (Add memory to accumulator) [A] <-- [A] + [[H-L]].
  • ADC r. (Add register with carry to accumulator). [A] <-- [A] + [r] + [CS].
  • ADC M. (Add memory with carry to accumulator) [A] <-- [A] + [[H-L]] [CS].
  • ADI data (Add immediate data to accumulator) [A] <-- [A] + data.
  • ACI data (Add with carry immediate data to accumulator). [A] <-- [A] + data + [CS].
  • DAD rp. (Add register paid to H-L pair). [H-L] <-- [H-L] + [rp].
  • SUB r. (Subtract register from accumulator). [A] <-- [A] – [r].
  • SUB M. (Subtract memory from accumulator). [A] <-- [A] – [[H-L]].
  • SBB r. (Subtract register from accumulator with borrow). [A] <-- [A] – [r] – [CS].
  • SBB M. (Subtract memory from accumulator with borrow). [A] <-- [A] – [[H-L]] – [CS].
  • SUI data. (Subtract immediate data from accumulator) [A] <-- [A] – data.
  • SBI data. (Subtract immediate data from accumulator with borrow). [A] <-- [A] – data – [CS].
  • INR r (Increment register content) [r] <-- [r] +1.
  • INR M. (Increment memory content) [[H-L]] <-- [[H-L]] + 1.
  • DCR r. (Decrement register content). [r] <-- [r] – 1.
  • DCR M. (Decrement memory content) [[H-L]] <-- [[H-L]] – 1.
  • INX rp. (Increment register pair) [rp] <-- [rp] – 1.
  • DCX rp (Decrement register pair) [rp] <-- [rp] -1.
   
   

  Logical instructions: The Instructions under this group perform logical operation such as AND, OR, compare, rotate etc. Examples are: ANA, XRA, ORA, CMP, and RAL etc.
  

• • ANA r. (AND register with accumulator) [A] <-- [A] ^ [r].
  • ANA M. (AND memory with accumulator). [A] <-- [A] ^ [[H-L]].
  • ANI data. (AND immediate data with accumulator) [A] <-- [A] ^ data.
  • ORA r. (OR register with accumulator) [A] <-- [A] v [r].
  • ORA M. (OR memory with accumulator) [A] <-- [A] v [[H-L]]
  • ORI data. (OR immediate data with accumulator) [A] <-- [A] v data.
  • XRA r. (EXCLUSIVE – OR register with accumulator) [A] <-- [A] v   [r]
  • XRA M. (EXCLUSIVE-OR memory with accumulator) [A] <-- [A] v  [[H-L]]
  • XRI data. (EXCLUSIVE-OR immediate data with accumulator) [A] <-- [A]
  • CMA. (Complement the accumulator) [A] <-- [A]
  • CMC. (Complement the carry status) [CS] <-- [CS]
  • STC. (Set carry status) [CS] <-- 1.
  • CMP r. (Compare register with accumulator) [A] – [r]
  • CMP M. (Compare memory with accumulator) [A] – [[H-L]]
  • CPI data. (Compare immediate data with accumulator) [A] – data.The 2nd byte of the instruction is data, and it is subtracted from the content of the accumulator. The status flags are set according to the result of subtraction. But the result is discarded. The content of the accumulator remains unchanged.
  • RLC (Rotate accumulator left) [An+1] <-- [An], [A0] <-- [A7],[CS] <-- [A7].
    The content of the accumulator is rotated left by one bit. The seventh bit of the accumulator is moved to carry bit as well as to the zero bit of the accumulator. Only CS flag is affected.
  • RRC. (Rotate accumulator right) [A7] <-- [A0], [CS] <-- [A0], [An] <-- [An+1].
    The content of the accumulator is rotated right by one bit. The zero bit of the accumulator is moved to the seventh bit as well as to carry bit. Only CS flag is affected.
  • RAL. (Rotate accumulator left through carry) [An+1] <-- [An], [CS] <-- [A7], [A0] <-- [CS].
  • RAR. (Rotate accumulator right through carry) [An] <-- [An+1], [CS] <-- [A0], [A7] <-- [CS]
  
  

• Branching instructios:  This group includes the instructions for conditional and unconditional jump, subroutine call and return, and restart. Examples are: JMP, JC, JZ, CALL, CZ, RST etc.

  • JMP addr (label). (Unconditional jump: jump to the instruction specified by the address). [PC] <-- Label.
  • Conditional Jump addr (label): After the execution of the conditional jump instruction the program jumps to the instruction specified by the address (label) if the specified condition is fulfilled. The program proceeds further in the normal sequence if the specified condition is not fulfilled. If the condition is true and program jumps to the specified label, the execution of a conditional jump takes 3 machine cycles: 10 states. If condition is not true, only 2 machine cycles; 7 states are required for the execution of the instruction.
    • JZ addr (label). (Jump if the result is zero)
    • JNZ addr (label) (Jump if the result is not zero)
    • JC addr (label). (Jump if there is a carry)
    • JNC addr (label). (Jump if there is no carry)
    • JP addr (label). (Jump if the result is plus)
    • JM addr (label). (Jump if the result is minus)
    • JPE addr (label) (Jump if even parity)
    • JPO addr (label) (Jump if odd parity)
  • CALL addr (label) (Unconditional CALL: call the subroutine identified by the operand)CALL instruction is used to call a subroutine. Before the control is transferred to the subroutine, the address of the next instruction of the main program is saved in the stack. The content of the stack pointer is decremented by two to indicate the new stack top. Then the program jumps to subroutine starting at address specified by the label.
  • RET (Return from subroutine)
  • RST n (Restart) Restart is a one-word CALL instruction. The content of the program counter is saved in the stack. The program jumps to the instruction starting at restart location.
  
  

•  Control instructions:   This group includes the instructions for input/output ports, stack and machine control. Examples are: IN, OUT, PUSH, POP, and HLT etc

  
  
  • IN port-address. (Input to accumulator from I/O port) [A] <-- [Port]
  • OUT port-address (Output from accumulator to I/O port) [Port] <-- [A]
  • PUSH rp (Push the content of register pair to stack)
  • PUSH PSW (PUSH Processor Status Word)
  • POP rp (Pop the content of register pair, which was saved, from the stack)
  • POP PSW (Pop Processor Status Word)
  • HLT (Halt)
  • XTHL (Exchange stack-top with H-L)
  • SPHL (Move the contents of H-L pair to stack pointer)
  • EI (Enable Interrupts)
  • DI (Disable Interrupts)
  • SIM (Set Interrupt Masks)
  • RIM (Read Interrupt Masks)
  • NOP (No Operation)

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