INTERNAL STRUCTURE OF INTEL 8085

Internal structure of 8085:
                                                   The functional block diagram of 8085

It consists of five essential blocks.

(1)    ARITHMETIC LOGIC SECTION

(2)     REGISTER SECTION

(3)     THE INTERRUPT CONTROL SECTION

(4)     SERIAL I/O SECTION

(5)     THE TIMING AND CONTROL UNIT

 ACCUMULATION (A): It is a 8 bit tri state register accessible to the user. Its tri state output is connected to the internal bus in addition, it has a two state 8 bit output. The content of the accumulator is always available at this two state output as the accumulator can be manipulated

Read More [...]

Posted in 8085 microprocessor, ARITHMETIC LOGIC SECTION, Internal structure of 8085, REGISTER SECTION, SERIAL I/O, STRUCTURE OF INTEL 8085, THE INTERRUPT CONTROL, THE TIMING AND CONTROL UNIT

REGISTER SET OF 8086 MICROPROCESSOR

Registers:

Most of the registers contain data/instruction offsets within 64 KB memory segment. There are four different 64 KB segments for instructions, stack, data and extra data. To specify where in 1 MB of processor memory these 4 segments are located the 8086 microprocessor uses four segment registers: 

Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor instructions. The processor uses CS segment for all accesses to instructions referenced by instruction pointer (IP) register. CS register cannot be changed directly. The CS register is automatically updated during far jump, far call and far return instructions. 

Read More [...]

Posted in 8086 microprocessor, Code segmentCode segment, REGISTER SET OF 8086